Developed during SBIR Phase I to demonstrate that the proposed architecture and software approach could meet RFP requirements before a larger Phase II commitment.• Defined the non-standard pin mapping not already covered by standards.• Implemented support for PCIe, LVDS, and VGA through the SOM-based architecture.• Retired technical, schedule, and financial risk by proving the MVP threshold before the larger development phase.

3U VPX backplane from a 3-board aircraft system with unibody aluminum housing and LCD integration. This page carries the routing and isolation detail that matters. Owned impedance calculations, stackup, creepage, class, and routing constraints for this slot and two additional non-public slots. Partitioned power and discretes to one side of the board to maximize isolation from PCIe, LVDS, VGA, 10/100 Ethernet, and other timing-sensitive channels.  Used an orthogonal routing strategy to manage density and signal integrity within a board thickness just under 0.150 inches.

6U expansion of the same system concept, executed as part of a 4-board architecture with added capability and inherited after earlier iterations stalled. Owned the stackup and routing constraints across the full system; routed the other three boards that are not public. Identified the real manufacturability problem as unbalanced copper, irregular plane geometry, and poor internal layer balance driving warp and twist. Corrected the design with solid planes plus fabrication notes for copper balancing, thieving, and Class 3 warp and twist compliance, enabling flat deliverable boards.

Complex digital board supporting the back-end processor and signal conditioning behind a 0.8 to 1 GHz front end and transmitter. Owned the board from schematic handoff through AS9100 production hardware on dock, including BOM verification, government parts procurement support, and supplier coordination. Managed seven design iterations and ultimately owned compartment placement and division to control emissions and protect receive sensitivity down to approximately -90 dBm. Validation issues were contained through minor enclosure improvements rather than late-stage board spins, and the design supported AIMS and TSO-certified transponder products.

Commercial derivative of the earlier MIL-oriented architecture, driven by pricing targets and market research for civil aviation. Condensed a two-board architecture into a reduced-function single-board product direction. Worked through the harder isolation and power-stability challenges introduced by integration.  Removed lower-value functions not commonly needed in civil aviation while preserving the core product intent.